| Project Directors | Jason Cong and Glenn Reinman |
| Students | Timothy Wong |
The LEON3 System-on-Chip platform is part of an open-source IP library from Gaisler Research, GRLIB. The system and its derivatives have been used both in professional and academic research applications. The Berkeley Emulation Engine 2 (BEE2) is a multi-chip FPGA board getting extensive use in research as an enabler for multi-core emulation and hardware acceleration for research applications. We make available the modification for LEON3 system for use with the BEE2. The LEON3 implementation of the established SPARC V8 instruction set architecture (ISA) in combination with its open-source implementation and attractive software support make it an increasingly popular platform for research applications. Combined with the high resource and high performance characteristics of the BEE2 allows wider range of LEON3 system configurations and another option for more application friendly multi-core research. We also modify the system for ASIC implementation and show viability for use as a real-world driver for current 2D CAD flows and a possible test bed for future 3D CAD flows.