Pilot

Pilot: Platform-Based Hardware/Software 
Codesign for System-on-Chips


This project addresses the problem of platform-based HW/SW synthesis system for field programmable System-on-a-Chip (FPSoC). It starts from a system-level design specification and targets at FPSoC platforms. In order to automate this process as much as possible, a System-level Data Model (SDM) is built in Pilot to provide a basis for developing system-level HW/SW synthesis algorithms and an abstraction for accepting different types of design specifications. A preliminary HW/SW co-design flow based on SDM is also proposed. Many key issues such as profiling, HW/SW partitioning, scheduling, interface generation, and code generation will be investigated.

To consider multi-cycle on-ship communication at the high level, we develop a new architectural synthesis system integrated with global placement, named MCAS (Multi-Cycle Architectural Synthesis), on top of the Regular Distributed Register (RDR) micro-architecture. The RDR architecture provides a regular synthesis platform for supporting multi-cycle communication. Novel architectural synthesis algorithms that integrate high-level synthesis with global placement have been developed in MCAS, including scheduling-driven placement and distributed controller generation, etc.


People
Project Director
Professor Jason Cong
Students
Software

 MCAS
Publications

  1. J. Cong, Y. Fan, G. Han, and Z. Zhang, "Application-Specific Instruction Generation for Configurable Processor Architectures,"  Proceedings of the ACM International Symposium on Field-Programmable Gate Arrays, February 2004.

  2. J. Cong, Y. Fan, G. Han X. Yang and Z. Zhang "Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication,"  Proceedings of International Conference on Computer Aided Design,, pp. 536-543, November 2003.

  3. J. Cong, Y. Fan, G. Han and Z. Zhang, "Architecture and synthesis for multi-cycle on-chip communication," Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis , Newport Beach, CA, 2003.

  4. J. Cong, Y. Fan, X. Yang and Z. Zhang, "Architecture and Synthesis for Multi-Cycle Communication,"  ACM/SIGDA Proceedings of 2003 International Symposium on Physical Design,pp. 190-196, Monterey, California, April 2003.

  5. Zhong Chen, Jason Cong, Yiping Fan, Xun Yang, and Zhiru Zhang, "Pilot - A Platform-Based HW/SW Synthesis System for FPSoC," Workshop on Software Support for Reconfigurable Systems, Feb. 2003.

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Sponsors
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Copyright  2004.  The Regents of the University of California.