Conference Publications
- Jeonghee Shin, John Darringer, Guojie Luo, Merav Aharoni,
Alexey Lvov, Gi-Joon Nam and Michael Healy,
"Floorplanning Challenges in Early Chip Planning,"
Proceedings of tje 24th IEEE International SoC Conference (SOCC
2011),
Taipei, Taiwan, September 2011. (to appear)
- Jason Cong, Guojie Luo and Yiyu Shi,
"Thermal-Aware Cell and Through-Silicon-Via Co-Placement for 3D ICs,"
Proceedings of the 48th Annual Design Automation Conference (DAC 2011),
San Diego, CA, June 2011.
- Jason Cong, John Lee, and Guojie Luo,
"A Unified Optimization Framework for Simultaneous Gate Sizing and Placement under Density Constraints,"
Proceedings of the IEEE International Symposium on Circuits and
Systems (ISCAS 2011),
Rio de Janeiro, Brazil, May 2011.
- Jeonghee Shin, John A. Darringer, Guojie Luo, Alan J. Weger, and Charles L. Johnson,
"Early Chip Planning Cockpit",
Design, Automation and Test in Europe (DATE 2011),
Grenoble, France, March, 2011.
- Thorlindur Thorolfsson, Guojie Luo, Jason Cong and Paul D. Franzon,
"Logic-on-Logic 3D Integration and Placement",
Proceedings of the 2nd IEEE International 3D System Integration Conference (3DIC 2010),
Munich, Germany, November 2010.
- Jason Cong and Guojie Luo,
"Analytical 3D Placement for Mixed-Size Circuits",
Proceedings of the International Symposium on Physical Design (ISPD 2010),
San Francisco, CA, pp. 61-66, March 2010.
- Jason Cong and Guojie Luo,
"A 3D Physical Design Flow Based on OpenAccess",
International Conference on Communications, Circuits and Systems (ICCCAS),
San Jose California, pp. 1103-1107, July 2009. (Invited Paper)
- Jason Cong and Guojie Luo,
"A Multilevel Analytical Placement for 3D ICs",
Proceedings of the 14th Asia and South Pacific Design Automation Conference (ASP-DAC 2009),
Yokohama, Japan, pp. 361-366, January 2009.
- Jason Cong, Chunyue Liu, and Guojie Luo,
"Quantitative Studies of Impact of 3D IC Design on Repeater Usage",
Proceedings of 25th International VLSI/ULSI Multilevel Interconnection Conference (VMIC),
Fremont, CA, pp. 344-348, October 2008. (Invited Paper)
- Jason Cong, and Guojie Luo,
"Highly Efficient Gradient Computation for Density Constrained Analytical Placement Problems,"
Proceedings of the International Symposium on Physical Design,
Portland, OR, April 2008.
- Jason Cong, Guojie Luo, Jie Wei, and Yan Zhang,
"Thermal-Aware 3D IC Placement via Transformation",
Proceedings of the 12th Asia and South Pacific Design Automation Conference (ASP-DAC 2007),
Yokohama, Japan, pp. 780-785, January 2007.
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Book Chapters
- Jason Cong and Guojie Luo,
"3D Physical Design",
Three Dimensional System Integration: IC Stacking Process and
Design,
ed. A. Papanikolaou, D. Soudris and R. Radojcic, Springer
Publishers, 2011.
- Jason Cong and Guojie Luo,
"Thermal-Aware 3D Placcement",
Three-Dimensional Integrated Circuit Design: EDA, Design and
Microarchitectures,
ed. Y. Xie, J. Cong and S. Sapatnekar, Springer Publishers, 2010.
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