EDUCATION

Peking Univ. (Sept. 2000 - Jul 2005)                             Ph.D. in Computer Science

Major: Computer Architecture    

Thesis: Research on Multi-Bitwidth and Multi-Voltage High-level Synthesis

Peking Univ. (Sept. 1996 - Jul 2000)                              BS in Computer Science

Major: Software                                                                                

Received first-class honors and scholarships in four consecutive years during college study. Ranked top 3 among 120 students. 

WORK AND RESEARCH EXPERIENCE

VLSI CAD Lab, University of California, Los Angeles

[Dec. 2006 - Present] Post Doctoral

Research interests include:

• Algorithms and synthesis flow of integrating back-end physical information (placement, interconnect, etc) into behavioral synthesis system to improve design qualities.

• Low-power synthesis flow with consideration of multi-vdd to optimize interconnection components, such as inter-voltage-island connections and MUXes.

• Synthesis algorithms for architectures with distributed register-files.

Microsoft ATC (Shanghai) Co., Ltd.

[Jul. 2006 - Dec. 2006] System Development Engineer (SDE)

• Implemented a plug-in for Visual Studio 2008 to support the development of services based on windows communication foundation (WCF).

Synopsys (Shanghai) Co., Ltd.

[Jul. 2005 - June 2006] Senior R&D Engineer in IG Group

•  Worked in the Astro team, and focused on physical synthesis and optimization to improve the tool performance and design qualities in terms of worst negative slack/hold, clock period, area utilization, DRC violation and so on.

• Solved various issues impacting the correctness and stability of Astro, such as compiler optimization error, memory overflow, and platform-dependent low-level function calls.

VLSI CAD Lab, University of California, Los Angeles

[Jul. 2003 - Jul. 2004] Exchange Ph.D. Student

• Applied bit-width analysis to behavioral synthesis based on two compiler frameworks, SUIF and LLVM. Proposed & implemented bitwidth-aware synthesis flow and optimization algorithms, which can efficiently reduce designs area and wirelength.

• Proposed & implemented multi-vdd binding algorithms based on min-cost network-flow method, which can efficiently reduce designs power consumption by maximizing the number of low-vdd resources and minimizing the total switching activities.

Microprocessor Research & Design Center, Peking University

[Oct. 1999 - Jul. 2005] Ph.D.

"UNITY863 Processor and System Targeting Network-PC" funded by 863 Program

• Participating in the design and implementation of an instruction-level simulator which is widely used in the software system construction of Unity-863.

• Ported GNU system software (compiler, assembler, linker, c library) to Unity-863 based system.

• Implemented a high performance C math Library for UNITY863 based system. Coded in assembly language. 

PUBLICATION

• Jason Cong, Junjuan Xu, "Simultaneous FU and Register Binding Based on Network Flow Method", DATE, Munich, Germany, March 2008..

• Deming Chen, Jason Cong, and Junjuan Xu, "Optimal Simultaneous Module and Multi-Voltage Assignment for Low-Power," ACM Transactions on Design Automation of Electronic Systems, vol. 11, Issue 2, pp. 362-386, April 2006.

• Deming Chen, Jason Cong, Junjuan Xu,"Optimality Study of Resource Binding with Multi-Vdds," Proc. of IEEE DAC, 2006

• Jason Cong, Yiping Fan, Guoling Han, Yizhou Lin, Junjuan Xu, Z. Zhang, X. Cheng, "Bitwidth-Aware Scheduling and Binding in High-Level Synthesis," Proc. of IEEE ASP-DAC, 2005

• Deming Chen, Jason Cong, Junjuan Xu, "Optimal Module and Voltage Assignment for Low-Power," Proc. of IEEE ASP-DAC, 2005

• Junjuan Xu, Jason Cong, Xu Cheng, "Lower-Bound Estimation for Multi-Bitwidth Scheduling," Proc. of IEEE ISCAS, 2005

• Junjuan Xu, Xu Cheng, "Lower-Bound Estimation of Functional Units in Time- Constrained Scheduling," Journal of CAD, 2005

• Junjuan Xu, Xu Cheng, "Comparison of Multi-voltage Scheduling under Two Different Assumptions," Journal of CAD, 2005