Welcome to the home page of Yi Zou

I am a sixth-year graduate student in VLSICAD Lab in CS Dept of UCLA, my advisor is Jason Cong.

Curriculum Vitae

Research Interests:

• Acceleration of Domain Specific Computation
• Scientific computing and optimization
• Statistical and variational modeling and simulation
• VLSI Physical design

Education

• Ph.D. student, Computer Science Department, UCLA, since Fall 2006.
• M.E. in Computer Science, Tsinghua University, Beijing, China, 2006.
• B.E. in Computer Science, Tsinghua University, Beijing, China, 2004.

Courses Taken

• Fall 2006

EE216A(Design of VLSI Circuits and Systems) EE236A(Linear Programming)

• Spring 2007

EE209S2(Special Topics in Embedded Computing Systems ) EE236B(Nonlinear Programming)

• Fall 2007

CS239(Parallel programming languages) CS251A(Advanced Computer Architecture)

• Winter 2008

CS259(Special topics on Embedded Systems (on security)) CS252A(Arithmetic Algorithms and Processors)

• Spring 2008

CS259(Special topics on Embedded Systems (on system-level approaches)) CS259 (topics on Embedded Systems (on wireless health))

• Spring 2009

CS258F(VLSI physical design automation)

Teaching

• Spring 2010

CS133(Parallel and Distributed Computing)

Contact

ZOU, YI

Research Assistant, VLSI CAD Lab

UCLA Computer Science Department

4651 Boelter Hall

Los Angeles, CA 90095

Tel: (310) 689-9644

Email: zouyi@cs.ucla.edu

Selected publications:

• J. Cong and Y. Zou, "Lithographic Aerial Image Simulation with FPGA-Based Hardware Acceleration", Proc. 16th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2008), pages 67-76, Monterey, CA, Feb 2008.
• J. Cong, K. Gururaj, B. Liu, C. Liu, Z. Zhang, S. Zhou and Y. Zou, "Evaluation of Static Analysis Techniques for Fixed-Point Precision Optimization", Proc. 17th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2009), pages 231-234, Napa, CA, Apr 2009
• J. Cong and Y. Zou, "FPGA-Based Hardware Acceleration of Lithographic Aerial Image Simulation", ACM Transactions on Reconfigurable Technology and Systems,Vol.2, No.3, Article 17, 2009
• J. Cong and Y. Zou, "Parallel Multi-level Analytical Global Placement on Graphics Processing Units", Proc. International Conference on Computer-Aided Design (ICCAD 2009), pages 697-704, San Jose CA, Nov 2009
• J. Cong and Y. Zou, "A Comparative Study on the Architecture Templates for Dynamic Nested Loops", Proc. 18th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2010), pages 251-254, Charlotte, NC, May 2010
• J. Cong, M. Huang and Y. Zou, "3D Recursive Gaussian IIR on GPU and FPGAs, A Case Study for Accelerating Bandwidth-Bounded Applications ", 9th IEEE Symposium on Application Specific Processors (SASP 2011), pages 70-73, San Diego, CA, Jun 2011
• J. Cong, M. Huang and Y. Zou, "Accelerating Fluid Registration Algorithm on Multi-FPGA Platforms", 21st International Conference on Field Programmable Logic and Applications (FPL 2011), Chania, Crete, Greece, Sep 2011
• A. Bui, K.Cheng, J. Cong, L. Vese, Y. Wang, B. Yuan and Y. Zou, "Platform Characterization for Domain-Specific Computing ", 17th Asia and South Pacific Design Automation Conference (ASPDAC 2012), Sydney, Australia, Jan 2012 (invited paper)
• J. Chen, J. Cong, M.Yan and Y. Zou, " FPGA-Accelerated 3D Reconstruction using Compressive Sensing", 20th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2012), Monterey, CA, Feb 2012
• Links to my publications before I came to UCLA.

Now I am mainly working on domain specific computing using either FPGAs or GPUs.
The first application domain we target at is VLSI/CAD domains.
The second domain is medical imaging related.

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